The present invention relates to the field of electronic storage. More particularly, the invention is directed towards flash memory and a file system therefore. Flash memory is becoming more and more widely used because information stored in a flash memory is maintained even when power is no longer supplied to the flash memory. Furthermore, flash memory is a solid state device and is extremely useful for portable devices such as portable computers, digital still cameras, etc. A flash memory consumes much less power and is not susceptible to shocks as are many types of magnetic storage media such as hard disks.
There are two types of flash memory, a NAND type and a NOR type. The NOR type of flash memory provides for random access, but is expensive to manufacture. The NAND type of flash memory, on the other hand, is relatively inexpensive but suffers from an inefficient write operation.
When a portion of the flash memory has previously been programmed (i.e., written) with data, reprogramming (i.e., over-writing) that portion of the flash memory with data requires performing an erase operation before the data can be written. Besides being inefficient, this erase before write, or EBW, process means the flash memory has a limited lifetime.
Flash memory is a transistor memory cell that is programmable through hot electron, source injection, or tunneling and erasable through the Fowler-Nordheim tunneling mechanism. The programming and erasing of such a memory cell requires current to pass through the dielectric surrounding a floating gate. Because of this, such types of memory have a finite number of erase-write cycles because the dielectric eventually deteriorates.
Several techniques have been proposed to mitigate the EBW problem. One method is to use a logical or virtual addressing scheme wherein, for example, a host system supplies a logical address for a read or a write operation to the flash memory that is then mapped into a physical address of the flash memory. During this process, data is preferably written into free physical space of the flash memory so that an erase operation does not need to be performed. This techniques involves maintaining a mapping table of logical addresses to physical addresses. Conventionally, this mapping operation requires both a translation and mapping operation. For example, a host device will supply logical addresses based on a 4 KB unit of data called a cluster. Stated another way, the file system of the host device, such as a computer, has a cluster size format. However, the physical addresses of the flash memory are established based on a unit of data that can be erased at one time, generally 16 KB or more, and the file system used by the controller for the flash memory in conventional flash memory systems is based on the physical structure of the flash memory. As a result, to map the logical address to the physical address, also requires a translation of the host device file system into the file system for the flash memory.
The mapping information for the flash memory must be maintained even when power is no longer supplied to the device incorporating the flash memory. Storing this information in the flash memory itself reduces the storage capacity of the flash memory, and can also result in configurations of the flash memory which are difficult to manage.
Additionally, the controller for the flash memory in these conventional systems includes an interface structure that so closely integrates the host interface functionality with the flash memory interface functionality that a change in the flash memory, a change in the host interface, or a change in a portion of the interface structure requires a complete redesign of the flash memory system.